Heuristic techniques for synthesis of hard real-time DSP application specific systems

We introduce an approach for design and optimization of ASIC implementations which realize multiple computational tasks under hard real-time constraints. The approach designs a multitask ASIC by combining techniques from hard real-time scheduling and behavioral synthesis. The key component of the methodology is successive multiresolution synthesis technique. The technique starts from an incompletely specified preliminary solution and uses interchangeably operating systems and behavioral synthesis tools to derive increasingly more detailed and complete design solution. The effectiveness of the optimization algorithms is demonstrated on several multiple task designs.